Caliptra
activeOpen-source silicon Root of Trust (RoT) security subsystem designed for integration into SoCs. Provides identity, measured boot, and attestation capabilities. Founded by Microsoft, AMD, Google, and NVIDIA in 2022 under the CHIPS Alliance. Version 2.1 adds quantum-resilient cryptography (ML-DSA for post-quantum signatures, ML-KEM for key exchange). ~1.6M logic gates with dual RISC-V cores. Potentially the most promising cross-vendor foundation for hardware-enabled AI governance.
Organizations
2| CHIPS Alliance | Open-source hardware development organization under the Linux Foundation. Hosts the Caliptra project (open-source silicon Root of Trust) with contributors including AMD, Google, Microsoft, NVIDIA, and Samsung. Develops open standards for chip security and interoperability. |
| QURI (Quantified Uncertainty Research Institute) | Nonprofit research organization developing tools for probabilistic reasoning, forecasting, and epistemic infrastructure. Key projects include Squiggle (probabilistic programming language), Squiggle Hub (model sharing platform), Metaforecast (forecast aggregation), SquiggleAI (LLM-powered estimation), RoastMyPost (LLM-powered content evaluation), and Guesstimate (spreadsheet for distributions). Founded in 2019 by Ozzie Gooen, evolved from earlier Guesstimate work (2016). Based in Berkeley, CA; primarily remote team of ~3-5 core contributors. Fiscally sponsored by Rethink Priorities. Funded by Survival and Flourishing Fund ($650K through 2022), Future Fund ($200K, 2022), and Long-Term Future Fund (ongoing). EIN 84-3847921. |
Related Projects
1| FlexHEG (Flexible Hardware-Enabled Guarantees) | Research project led by Yoshua Bengio developing open-source hardware-enabled guarantees for AI governance. Proposes a "Guarantee Processor" that monitors accelerator usage and verifies compliance, combined with a "Secure Enclosure" providing physical tamper protection. Funded with $4.1M from the Survival and Flourishing Fund (2024). Published interim report (September 2024), technical options paper (arXiv:2506.03409), and international security applications paper (arXiv:2506.15100). Interlock-based design gives the Guarantee Processor direct access to the accelerator data path. Estimated 3.7-7.9 years for integrated hardware deployment. |
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